The present invention relates to microelectronics, especially semiconductor chips and more particularly to structures for forming metallurgical interconnections of chips.
The external conductive interconnection of chips, e.g., micro-scale devices such as semiconductor integrated circuits (ICs) and other devices such as micro-electromechanical devices (“MEMs”), has long provided challenges in the design and methods of manufacturing them. Typically, the conductive contacts of chips are externally interconnected to other elements such as to package-level interconnects via metallurgical bonds. Metallurgical bonds are formed by heating a fusible material such as solder, tin or a eutectic composition to a temperature at which that material fuses to a metal at a surface of the chip and at a surface of another element with which the chip is in contact.
High performance microelectronic devices frequently utilize solder bumps to form interconnections between external pads of chips and other elements, particularly corresponding contacts of a package element. An example of the use of solder bumps to provide such interconnections is known as “controlled collapse chip connection” or “C4” technology. C4 technology is a specific way of forming flip-chip interconnections in which contact pads of chips are interconnected through solder bumps to corresponding contact pads of a package or circuit element having wiring traces thereon. In C4 technology, solder bumps are typically joined to a chip through a particular type of under bump metallization (“UBM”) known as “ball limiting metallurgy” (“BLM”). The BLM typically includes a layered stack of metals and primarily functions to promote adhesion between metals, e.g., component metals of solder and those of the pads interconnected thereby, while restricting diffusion of the metals to within acceptable limits.
The use of copper has increased in recent years for forming conductive interconnections between individual devices and circuits of chips, e.g., during “back-end-of-line” (“BEOL”) manufacturing of chips. Copper interconnect technology for such BEOL interconnections has become well-developed. However, the technology for interconnecting external pads of a chip has not kept pace with these developments. Corresponding development is needed in the BLM structure. Heretofore, BLMs were designed for contacting external aluminum pads of a chip. In places where C4 interconnects are provided to chips with copper pads, an aluminum pad has been required as an intermediate layer between the copper pads and the BLM. A BLM structure and processing method is needed for providing a BLM structure by which the intermediate aluminum pad can be eliminated. In this way, reductions in process complexity can be achieved.